{"id":91,"date":"2026-08-20T07:06:54","date_gmt":"2026-08-20T11:06:54","guid":{"rendered":"https:\/\/blogs.mathworks.com\/engineering\/?p=91"},"modified":"2026-08-20T07:06:54","modified_gmt":"2026-08-20T11:06:54","slug":"how-do-we-know-our-system-will-actually-work","status":"publish","type":"post","link":"https:\/\/blogs.mathworks.com\/engineering\/2026\/08\/20\/how-do-we-know-our-system-will-actually-work\/","title":{"rendered":"How Do We Know Our System Will Actually Work?"},"content":{"rendered":"
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I talk about Model-Based Design a lot and in different forums: industries, universities, conferences. I usually position it as a way of ensuring our systems behave as we intended them to.<\/span><\/div>\n
And almost every time, someone asks the obvious follow-up (paraphrasing a bit): how do I actually know the system behaves the way I intended? <\/span><\/div>\n
Then I’ll normally talk about V&V, testing under different conditions, checking your system at different stages of its lifecycle. All of which is true, mind you, albeit fairly abstract. If you already know the answer, it all makes sense. If you don’t, it probably sounds like engineering word-salad.<\/span><\/div>\n
So, in this blog, let’s talk about: desktop simulation (which is sometimes referred to as Model-in-the-Loop (MiL)), Software-in-the-Loop (SiL), Processor-in-the-Loop (PiL), Hardware-in-the-Loop (HiL). What each one actually means, when you’d reach for each, and why it matters.<\/span><\/div>\n
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Let’s look at the temperature control of a battery pack as an example. In this abstracted Simulink block diagram, we have a battery pack (our plant), the load it is driving and a controller that takes in the measured temperature of the pack and provides the appropriate coolant flow. The cooling system is integrated inside the battery pack subsystem.<\/span><\/div>\n
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Desktop Simulation <\/span>\"\"<\/h2>\n
This is the easy one… I mean, if you’re here you probably use Simulink, MATLAB or some other tool to model your systems, right? If so, you’ve done it! You’ve modeled your algorithms before you put them on your real system. Here, everything runs in simulation, our controller, our pack, our load, they’re all in Simulink and Simscape. <\/span><\/div>\n
Why start with simulating on our desktop? Later stages let you see signals and change things too, but here is where we can do it in isolation. Nothing is constrained by generated code, a target processor or real-time deadlines yet, we are free to focus on the design itself, the control law and the plant dynamics. That isolation is what lets us iterate fastest: change anything and explore the solution space freely. If the loop is unstable, if the controller chatters around the setpoint, if our fallback logic doesn’t trigger when a sensor drops out… we can find that out *here*, cheaply, before any hardware constraints cloud the picture.<\/span><\/div>\n
For our battery pack, this is where we can confirm that the coolant flow controller actually holds the pack temperature at setpoint across a realistic profile; or that it fails gracefully if the temperature sensor drops. This is where we’d also explore different failure modes safely. <\/span><\/div>\n
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Software in the Loop (SiL) <\/span>\"\"<\/h2>\n
Now generate C from the controller model, compile that generated code for our development machine, and run it against the same plant model. The controller is now the actual software we intend to run on our device (not a Simulink representation of it). <\/span><\/div>\n
Architecturally, not much changes from our desktop simulation: the same test harness drives the same plant model, and we simply swap the Simulink subsystem that held the controller for a block that runs the generated C code instead. <\/span><\/div>\n
In my case, this translation from Simulink to C has never been manual. I tend to use tools like Embedded Coder to facilitate that and ensure full traceability of each line of C back to my model’s blocks. <\/span><\/div>\n
Why do SiL? Why compare our C to our Simulink response? It allows us to check if the implementation that is going to our embedded hardware matches our Simulink design. This allows us to check for any effect on precision\/ data type conversion\/ quantization errors. We could also check the possible implementations for different hardware.<\/span><\/div>\n
Again, everything happens on our host machine. But, instead of Simulink, our controller now runs the C code that will go on our hardware (soon!).<\/span><\/div>\n
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Processor in the Loop (PiL)<\/span>\"\"<\/h2>\n
Now if we are happy that our embedded code matches our design, the next step is to test it on the actual board. Here, the algorithms live on the board, but our plant still lives in simulation.<\/span><\/div>\n
Why do we want to do PiL? we want to check if the target executes the code reliably and if it produces the same answers as the host. This is where we may find out that the sample rate you assumed at the desktop simulation stage was optimistic. <\/span><\/div>\n
Also, processors differ in word length, floating-point support, memory hierarchy, and interrupt behavior. Code that comfortably held its sample rate on our desktop may not on a small embedded part.<\/span><\/div>\n
For our battery pack, this is where we’d confirm the controller keeps its thermal sample rate on the actual board and the flow rate it computes matches what the host produced. <\/span><\/div>\n
One caveat: PiL is not (necessarily) real-time. The board and the host exchange data step by step, and the plant, still simulating on the host, simply waits for the board between steps. That makes it a cross-target, co-simulation kind of test, and testing can get slow when the host-side model is heavy. So, the questions we are trying to answer here are mostly functional, rather than temporal. <\/span><\/div>\n
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Hardware in the Loop (HiL) <\/span>\"\"<\/h2>\n
Now the plant model moves onto a real-time simulator, for example a <\/span>Speedgoat<\/span><\/a> system, running in hard real time on hardware built for deterministic execution, and the controller talks to it through its own physical I\/O. <\/span><\/div>\n
At the system level, the controller no longer sees simulated numbers handed to it on the host\u2019s schedule; it exchanges signals with a plant that is always running and always presenting values for it to react to, on the same kind of interfaces it will meet in the field. Those interfaces are real: analogue channels carrying real voltages, PWM outputs driving a real actuator signal, and CAN, SPI or Modbus traffic arriving over the wire, when it arrives.<\/span><\/div>\n
Worth noting from a workflow point of view: even though the plant has left the host computer, from the user\u2019s side little changes. The Simulink model on our computer becomes a console onto the target, and we start, stop, tune and log the model running on the real-time hardware much as we would a model running locally. The host is now doing the monitoring and analytics, and the real-time computation is happening on the target. <\/span><\/div>\n
What’s the question HiL attempts to answer? <\/span><\/div>\n
Our algorithm can be right, our code faithful and our processor fast enough, and the loop can still behave differently once every signal path is real. The controller is not waiting for anything; the plant is simply running, and the controller has to react to signals as they actually arrive, with the real timing, delays and jitter of physical interfaces rather than the instantaneous, perfectly ordered exchange it saw at every earlier stage. For our battery pack, HiL is where we’d find out whether the controller still holds pack temperature once it’s the real board driving real outputs, with the actual latency of sensor and comms traffic between the pack and the controller, rather than the instantaneous, perfectly ordered exchange every earlier stage assumed.<\/span><\/div>\n
Something to keep in mind, HiL needs a real-time plant simulator and matching I\/O hardware, which is a genuine capability threshold rather than a line item. How far we can get without it depends heavily on the dynamics. For slow, latency-tolerant systems like the thermal loop in this example, PiL may well be far enough for a research prototype. For fast, latency-sensitive plants, a motor drive being the obvious case, the host will never simulate quickly enough to close the loop, and PiL stops being sufficient long before we reach production. <\/span><\/div>\n

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What checks what<\/span><\/h2>\n