{"id":642,"date":"2026-06-12T11:57:52","date_gmt":"2026-06-12T15:57:52","guid":{"rendered":"https:\/\/blogs.mathworks.com\/semiconductors\/?p=642"},"modified":"2026-06-12T11:57:52","modified_gmt":"2026-06-12T15:57:52","slug":"from-eye-closure-to-root-cause-practical-jitter-diagnostics-for-serdes-links","status":"publish","type":"post","link":"https:\/\/blogs.mathworks.com\/semiconductors\/2026\/06\/12\/from-eye-closure-to-root-cause-practical-jitter-diagnostics-for-serdes-links\/","title":{"rendered":"From Eye Closure to Root Cause: Practical Jitter Diagnostics for SerDes Links"},"content":{"rendered":"<p>At <strong>multi-gigabit<\/strong> data rates, a clean-looking channel simulation can still leave you with a failing eye. The hard part is not just measuring that jitter exists; it is figuring out which timing effects are closing the eye, how much margin they are consuming, and whether the next design move should be clock cleanup, equalization, channel modeling, or noise reduction.<\/p>\n<p>This article shows how to turn total jitter from a single pass\/fail number into <strong>design guidance<\/strong>. We\u2019ll walk through two practical workflows: one for controlled waveform experiments where impairments can be injected and checked, and one for observing jitter metrics directly inside a SerDes system simulation as the design runs.<\/p>\n<p>Along the way, we\u2019ll <strong>separate<\/strong> random, deterministic, sinusoidal, duty-cycle, and ISI-related jitter; show where the estimates are <strong>reliable or fragile<\/strong>; and close with a <strong>checklist<\/strong> for getting numbers you can trust before making design decisions.<\/p>\n<pre style=\"text-align: center;\">Interested to learn more? visit our <a href=\"https:\/\/www.mathworks.com\/solutions\/semiconductors.html\">MathWorks Solutions for Semiconductors Site<\/a><\/pre>\n<h2>From Total Jitter to Actionable Components<\/h2>\n<p>In practice, <a href=\"https:\/\/www.mathworks.com\/help\/serdes\/ref\/jitter.html\">jitter<\/a> is rarely a single phenomenon. What you typically care about is shown in <span style=\"font-style: normal !msorm;\"><em>Figure 1<\/em><\/span> and defined below.<\/p>\n<p style=\"text-align: center;\"><img decoding=\"async\" loading=\"lazy\" class=\"alignnone wp-image-643 size-full\" src=\"http:\/\/blogs.mathworks.com\/semiconductors\/files\/2026\/06\/Figure-1.jpg\" alt=\"Diagram showing total jitter broken into random jitter and deterministic jitter, with deterministic jitter further divided into DCD, ISI, periodic jitter, and sinusoidal jitter.\" width=\"975\" height=\"490\" \/><\/p>\n<p style=\"text-align: center;\">Figure 1: Breakdown of Jitter into the various types<\/p>\n<p>&nbsp;<\/p>\n<ul>\n<li><strong>Total jitter (TJ):<\/strong> what the receiver \u201cfeels\u201d at the sampling instant<\/li>\n<li><strong>Random jitter (RJ):<\/strong> unbounded, unpredictable timing deviation<\/li>\n<li><strong>Deterministic jitter (DJ):<\/strong> bounded timing variation that includes periodic and data-dependent effects<\/li>\n<li><span style=\"font-weight: normal !msorm;\"><strong>Data-dependent jitter (DDJ):<\/strong><\/span> deterministic jitter correlated with the transmitted data pattern, often caused by duty-cycle distortion and intersymbol interference<\/li>\n<li><strong>Duty-cycle distortion (DCD):<\/strong> systematic even\/odd or rise\/fall timing asymmetry<\/li>\n<li><strong>Intersymbol Interference (ISI):<\/strong> channel dispersion causing overlapping signal pulses between adjacent symbols<\/li>\n<li><span style=\"font-weight: normal !msorm;\"><strong>Periodic jitter (PJ):<\/strong><\/span> bounded deterministic jitter that repeats at one or more specific frequencies<\/li>\n<li><strong>Sinusoidal jitter (SJ):<\/strong> periodic jitter with identifiable frequency content<\/li>\n<\/ul>\n<p>One way to group jitter is by whether it\u2019s <strong>bounded or unbounded<\/strong>. Bounded jitter has upper and lower amplitudes while unbounded jitter, theoretically, does not.<\/p>\n<p>Another way to group jitter is whether it\u2019s <strong>correlated or uncorrelated<\/strong>. Correlated jitter is connected to the data pattern itself while uncorrelated jitter is not connected to the data pattern. It comes from something unrelated to the data pattern, like a clock, crosstalk, or thermal noise.<\/p>\n<p>These distinctions matter because modern measurement workflows can exploit them by turning total jitter from a single number into a set of actionable diagnostics.<\/p>\n<p>A measurement approach that <strong>separates these components<\/strong> helps you answer the questions that matter in bring-up and architecture work. For example:<\/p>\n<ul>\n<li>Is the \u201cextra\u201d jitter coming from <strong>noise-like effects<\/strong>, such as RJ, or from a <strong>bounded deterministic source<\/strong>, such as SJ, PJ, DCD, DDJ, or from crosstalk?<\/li>\n<\/ul>\n<ul>\n<li>Is one symbol interfering with the next through ISI, meaning you should focus on <strong>equalization and channel modeling<\/strong> first?<\/li>\n<\/ul>\n<p>Jitter degrades the eye diagram regardless of its source, as illustrated in <span style=\"font-style: normal !msorm;\"><em>Figure 2<\/em><\/span>. The eye diagram on the left represents a system without any extra Tx or Rx jitter added and shows an eye width of 79.6 ps. In contrast, the eye diagram on the right corresponds to the same system with some RJ and DJ jitter added, where the eye width decreases to 63.5 ps, a ~20% reduction.<\/p>\n<p style=\"text-align: center;\"><img decoding=\"async\" loading=\"lazy\" class=\"alignnone wp-image-644 size-full\" src=\"http:\/\/blogs.mathworks.com\/semiconductors\/files\/2026\/06\/Figure-2.jpg\" alt=\"Side-by-side eye diagrams comparing a link without transmitter or receiver jitter and the same link with jitter added, showing reduced eye width in the jittered case.\" width=\"1024\" height=\"307\" \/><\/p>\n<p style=\"text-align: center;\">Figure 2: Left &#8211; eye diagram with no Tx or Rx jitter and eye width = 79.6 ps. Right &#8211; eye diagram with jitter and eye width = 63.5 ps<\/p>\n<p><span style=\"font-style: normal !msorm;\">\u00a0<\/span><\/p>\n<p>Once the eye is closing due to jitter, the next question is which jitter sources are responsible.<\/p>\n<h2>Two Workflows, One Goal<\/h2>\n<h3>Waveform-based workflow: Inject impairments, estimate jitter components, sanity-check results<\/h3>\n<p>The first example focuses on a simple but powerful loop: <strong>generate a waveform <\/strong><strong>&#8211;&gt; add jitter impairments &#8211;&gt;<\/strong><strong>\u00a0measure timing error <\/strong><strong>&#8211;&gt; estimate jitter components.<\/strong><\/p>\n<p>At a high level, the workflow looks like this:<\/p>\n<ol>\n<li><strong>Create an oversampled stimulus<\/strong> (for example, a PRBS pattern at a chosen unit interval).<\/li>\n<li><strong>Apply jitter impairments<\/strong> such as DCD, SJ (with frequency), and RJ to the stimulus configuration.<\/li>\n<li><strong>Generate<\/strong> the waveform.<\/li>\n<li><strong>Measure<\/strong> jitter metrics.<\/li>\n<\/ol>\n<p>Here&#8217;s the key value: the estimate returns <strong>both TJ metrics and component estimates<\/strong> (RJrms, DJpkpk, SJa\/SJf\/SJp, DCDpkpk, and more).<\/p>\n<p><strong>Why this is useful:<\/strong> it&#8217;s easy to <strong>sanity-check<\/strong> the setup by comparing the injected impairments with the estimated results, such as verifying how DCD is represented and how SJ amplitude maps to the estimate. It also makes it straightforward to inspect the timing interval error and see how the jitter components relate, with <em>Figure 3<\/em> showing how the workflow leads to those results.<\/p>\n<p style=\"text-align: center;\"><img decoding=\"async\" loading=\"lazy\" class=\"alignnone wp-image-645 size-full\" src=\"http:\/\/blogs.mathworks.com\/semiconductors\/files\/2026\/06\/Figure-3.jpg\" alt=\"Plots of timing interval error edge occurrences and distribution, illustrating how timing deviations are measured and separated into jitter components.\" width=\"624\" height=\"416\" \/><\/p>\n<p style=\"text-align: center;\">Figure 3: Timing Interval Error Edge Occurrences and Distribution<\/p>\n<p><strong><a href=\"https:\/\/www.mathworks.com\/help\/signal-integrity\/ref\/timeintervalerror.html\">Time Interval Error (TIE)<\/a><\/strong> is a measure of how each event&#8217;s timing in a signal deviates from its ideal schedule. In practice, it indicates whether each successive clock cycle or data interval arrives slightly early or late relative to a perfect reference, effectively capturing the accumulated timing jitter over time.<\/p>\n<p>Also, <strong><a href=\"https:\/\/www.mathworks.com\/help\/serdes\/ref\/timingerror.html\">Timing Error (TE)<\/a> <\/strong>is the difference between the measured signal transition time and the ideal transition time defined by the reference symbol clock. Evaluated across many unit intervals, the resulting timing error captures the combined effects of random, deterministic, and data-dependent jitter components.<\/p>\n<h4>Do not skip this: Accuracy vs precision in component estimates<\/h4>\n<p>Not all jitter metrics should be trusted equally without context. One of the most practical takeaways from the waveform-based example is that different <strong>jitter metrics behave differently<\/strong> in terms of accuracy and sensitivity to measurement assumptions.<\/p>\n<ul>\n<li>TJ metrics are computed directly from the TE sequence, so if edge detection and alignment are correct, <strong>TJ tends to be accurate<\/strong>.<\/li>\n<li>RJ RMS is commonly <strong>overestimated<\/strong>, because it is effectively &#8220;what is left&#8221; after subtracting other component estimates from the TE. Any error in other components leaks into RJ.<\/li>\n<li>DJ and DDJ are combinations of other jitter metrics (DDJ = DCD + ISI and DJ = DDJ + SJ).<\/li>\n<li>SJ estimates depend on a discrete Fourier Transform (DFT)-based approach; <strong>frequency-bin alignment <\/strong>affects accuracy, and phase can be particularly sensitive.<\/li>\n<\/ul>\n<h4>Measuring ISI-related jitter: consider supplying an impulse response<\/h4>\n<p>Estimating ISI-related jitter typically involves <strong>recovering a pulse\/impulse response from the data<\/strong>, then synthesizing an &#8220;ISI-only&#8221; waveform for timing error comparison.<\/p>\n<p>That recovery can be distorted if the waveform also contains significant non-ISI jitter. A practical remedy is to <strong>provide an impulse response directly<\/strong> (from a simulated channel model, extracted channel response, or a fitted model), which improves the stability of the ISI characterization.<\/p>\n<h3>In-model workflow: View jitter metrics as the SerDes simulation runs<\/h3>\n<p>If waveform-based analysis tells you what happened after a run, <strong>in-model measurement helps you see when it happens<\/strong>. This workflow places a jitter measurement stage in the data path of a time-domain SerDes simulation, so timing error and component metrics can update while receiver behavior, equalization, or adaptation is evolving.<\/p>\n<p>A practical setup looks like this:<\/p>\n<ul>\n<li><strong>Configure<\/strong> the transmitter and receiver jitter sources you want to study, such as DCD, RJ, and SJ.<\/li>\n<li>Run the signal through the SerDes data path so the <strong>measurement point reflects the waveform seen by the receiver<\/strong>.<\/li>\n<li><strong>Measure<\/strong> jitter at the receiver-side waveform output.<\/li>\n<li>Set the measurement <strong>time base<\/strong> and <strong>edge-detection<\/strong> assumptions:\n<ul>\n<li>Symbol thresholds<\/li>\n<li>Symbol time<\/li>\n<li>Sample time<\/li>\n<li>Symbol decimation, or how often metrics are updated<\/li>\n<li>Recovered impulse response length, if estimating ISI-related jitter from the waveform<\/li>\n<\/ul>\n<\/li>\n<li>Select the <strong>output metrics<\/strong> needed for debug, such as TJrms, RJrms, SJ, DCD, and ISI-related jitter.<\/li>\n<li><strong>Visualize those metrics over time<\/strong> to see whether the jitter estimates are steady, drifting, or changing during receiver adaptation, see <em>Figure 4<\/em>.<\/li>\n<\/ul>\n<p><strong>Why this is useful:<\/strong> the measurement stays inside the running SerDes simulation, so you can watch jitter behavior frame-by-frame instead of waiting until the end of a run. That makes it easier to connect changes in jitter metrics to design events such as startup transients, adaptation settling, or receiver configuration changes. This also emphasizes fixed-memory measurement and frame-based metric updates, which are useful when running longer simulations.<\/p>\n<p style=\"text-align: center;\"><img decoding=\"async\" loading=\"lazy\" class=\"alignnone wp-image-646 size-full\" src=\"http:\/\/blogs.mathworks.com\/semiconductors\/files\/2026\/06\/Figure-4.jpg\" alt=\"Time-based plots from a SerDes simulation showing jitter metrics updating frame by frame for continuous visibility during the run.\" width=\"936\" height=\"657\" \/><\/p>\n<p style=\"text-align: center;\">Figure 4: Jitter metrics update frame-by-frame for continuous visibility.<\/p>\n<h4>Improving ISI characterization in the system model<\/h4>\n<p>Similar to the waveform-based approach, because ISI-related jitter estimation depends on impulse response reconstruction, it can be more consistent to <strong>use a known channel impulse response<\/strong> and to set symbol levels accordingly.<\/p>\n<p>This tends to stabilize ISI separation and can also reduce downstream distortion in other estimated components (notably RJ).<\/p>\n<h2>Getting Trustworthy Jitter Numbers: A Short Checklist<\/h2>\n<p>Whether you\u2019re analyzing captured waveforms or measuring jitter inside a system-level SerDes simulation, a few practical checks go a long way:<\/p>\n<ul>\n<li><strong>Validate thresholds and symbol time<\/strong> early: incorrect crossing detection ruins everything downstream.<\/li>\n<li><strong>Use long enough frames<\/strong> (symbol decimation \/ number of UIs) to reduce estimate variance, especially for RJ and low-frequency periodic content.<\/li>\n<li>For <strong>sinusoidal jitter<\/strong>, remember the estimate uses FFT\/DFT behavior: frequency-bin alignment matters, and phase is the most fragile.<\/li>\n<li>For <strong>ISI-related jitter<\/strong>, prefer supplying a known impulse response when possible; recovered impulse responses can pick up spurious behavior in the presence of other jitter sources.<\/li>\n<\/ul>\n<h2>Conclusion<\/h2>\n<p>Jitter isn\u2019t just a pass\/fail number, it\u2019s a <strong>design feedback signal<\/strong>. When you can separate <strong>RJ vs DJ<\/strong>, identify <strong>periodic components<\/strong>, and quantify <strong>ISI-correlated timing shifts<\/strong>, you can make faster decisions about where to spend effort: clocking, equalization, channel modeling, or noise mitigation.<\/p>\n<p>The two workflows above are complementary, so use the one that matches how you\u2019re iterating your design.<\/p>\n<ul>\n<li>Use the waveform-based workflow when you want controlled impairment injection, component\u2011level validation, and sanity\u2011checking of measurement behavior.<\/li>\n<li>Use the in-model workflow when you want continuous visibility during long simulations, architectural iteration, or adaptive receiver convergence.<\/li>\n<\/ul>\n<h2>To try these workflows in detail, explore the step-by-step examples below.<\/h2>\n<ul>\n<li><a href=\"https:\/\/www.mathworks.com\/help\/serdes\/ug\/model-and-measure-jitter-in-serial-data-systems.html\">Model and Measure Jitter in Serial Data Systems<\/a><\/li>\n<\/ul>\n<p>I&#8217;d love to hear your perspectives, please share your thoughts and experience in the comments below!<\/p>\n<pre style=\"text-align: center;\">Interested to learn more? visit our <a href=\"https:\/\/www.mathworks.com\/solutions\/semiconductors.html\">MathWorks Solutions for Semiconductors Site<\/a><\/pre>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<div class=\"overview-image\"><img src=\"https:\/\/blogs.mathworks.com\/semiconductors\/files\/2026\/06\/Figure-2.jpg\" class=\"img-responsive attachment-post-thumbnail size-post-thumbnail wp-post-image\" alt=\"\" decoding=\"async\" loading=\"lazy\" \/><\/div>\n<p>At multi-gigabit data rates, a clean-looking channel simulation can still leave you with a failing eye. The hard part is not just measuring that jitter exists; it is figuring out which timing effects&#8230; <a class=\"read-more\" href=\"https:\/\/blogs.mathworks.com\/semiconductors\/2026\/06\/12\/from-eye-closure-to-root-cause-practical-jitter-diagnostics-for-serdes-links\/\">read more >><\/a><\/p>\n","protected":false},"author":236,"featured_media":644,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[1],"tags":[],"_links":{"self":[{"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/posts\/642"}],"collection":[{"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/users\/236"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/comments?post=642"}],"version-history":[{"count":10,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/posts\/642\/revisions"}],"predecessor-version":[{"id":657,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/posts\/642\/revisions\/657"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/media\/644"}],"wp:attachment":[{"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/media?parent=642"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/categories?post=642"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.mathworks.com\/semiconductors\/wp-json\/wp\/v2\/tags?post=642"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}